1. Field of the Invention
The present invention relates to an error rate control apparatus for use in a wireless communication system.
2. Description of the Related Art
Recently, mobile telephones have become widespread, and are expected to further extend its market. Furthermore, in the next-generation mobile telephone system, there is the tendency to set the worldwide standards and configure a mobile telephone system of common standards in the world.
In the mobile telephone system, a communications system in which a plurality of transport CHs (or a logic CH) are multiplexed and mapped to the physical CH, and a control signal indicating the format of a transport CH is also mapped to the physical CH is being realized. For example, the W-CDMA, which is one of the next-generation mobile telephone system (IMT-2000), corresponds to the above mentioned system. In the W-CDMA, the TrCH (Transport Channel) such as a voice signal, multimedia data, a control signal, etc. is multiplexed, and mapped to the physical CH for transmission. To improve the transmission efficiency, the mapping to the physical CH is changed in a physical frame unit if it is not necessary to transmit multimedia data during the communications, or a voice signal is unnecessary. At this time, a control signal indicating the format of the TrCH referred to as TFCI (Transport Format Combination Indicator) is used.
Consider that signals to be transmitted can be any of the three types of 100, 200, 300 bits respectively referred to TrCH0, TrCH1, and TrCH2. When they are mapped to the physical CH, they are assumed to be transmitted in any of the following combinations, and the TFCI is defined as follows. The combinations are determined in advance between the transmitter and the receiver, and the other combinations are not allowed.    Combination 0: TFCI=0 for no signals    Combination 1: TFCI=1 for only TrCH0    Combination 2: TFCI=2 for only TrCH1    Combination 3: TFCI=3 for only TrCH2    Combination 4: TFCI=4 for TrCH0+TrCH1    Combination 5: TFCI=5 for TrCH0+TrCH2
When transmitting TrCH0 and TrCH1, the transmitter transmits TrCH0 and TrCH1 with TFCI=4.
FIG. 16 is a block diagram showing the configuration of the transmitting device.
A buffer for TrCH0, a buffer for TrCH1, and a buffer for TrCH2 buffer the data of the respective transport channels, and transmit the data of the respective transport channels through a selection device 10 at the next stage. The selection device 10 selects the data of the transport channel input from each buffer. For example, when only TrCH0 is transmitted as in the above mentioned Combination 1, the buffer for TrCH0 is selected for transmission of data. An error control, etc. process unit 11 transmits data after adding an error detection code such as a CRC to each piece of frame data of each transport channel.
Then, a composition unit 12 composes data of each transport channel for mapping to the physical frame. When a slot is completed for mapping to the composed and generated physical frame, a TFCI addition unit 13 adds a TFCI. Furthermore, a TPC and PILOT addition unit 14 adds a TPC and a PILOT signal to a slot. Then, a modulator 15-1 of a radio unit 15 modulates data, and an amplifier 15-2 amplifies a modulation signal and transmits it through an antenna 16.
A physical frame of a physical channel comprises 15 slots. Therefore, for example, if one unit of the TFCI data is transmitted by one physical frame, then one unit of the TFCI is divided into 15 pieces and then transmitted.
Furthermore, a control device 17 receives an instruction from an upper layer about power of which data in one slot is set to what magnitude. According to the instruction the control device 17 controls the amplification gain of the amplifier 15-2.
FIG. 17 is a block diagram showing the configuration of a receiving device.
First, a signal received by an antenna 20 is demodulated by a radio unit 21, and a TFCI detection unit 22 detects a set value of the TFCI. Then, based on the detected TFCI, a TrCH division unit 23 separates a transport channel, and a error control, etc. process unit 24 detects an error, and the respective transport channels are input into the TrCH0, TrCH1, and TrCH2 buffers, and transmitted to the processing unit at the subsequent stage.
That is, the receiver first determines the TFCI, and if TFCI=4, then it proves TrCH0+TrCH1, and the process of dividing a signal into the TrCH0 and the TrCH1.
As described above, the TFCI is an important signal for transmission of a signal. If a TFCI is mistakenly received, then all TrCH signals are mistakenly processed. Therefore, the TFCI is designed for larger transmission power by the transmitter.
FIG. 18 shows the data format of the down line of the W-CDMA.
FIG. 18 shows the configuration of one slot. As described above, fifteen slots form one physical frame. The TPC, TFCI, and PL are overhead. That is, the TPC sets data for transmission power control, and the PL is a pilot signal. A TrCH signal is mapped to the Data 1 and Data 2. The PO1 is a power offset value of the TrCH and TFCI.
The transmission power control is performed by the receiver measuring the error rate of the TrCH, and requesting the transmitter to satisfy the requirements for the quality. For example, if the obtained error rate is higher than a predetermined error rate as a result of the measurement of the error rate of the TrCH, the receiver requests the transmitter to increase the transmission power by 1 dB. In response to the request, the transmitter increases the transmission power by, for example, 1 dB, and transmits it with the values of the PO1 through PO3 maintained.
Therefore, although the TFCI is wrong, the TrCH is mistakenly considered to be wrong, and the transmission power is requested to be increased for all data, TPC, TFCI, and PL. Therefore, if the TFCI is wrong, it is necessary to increase the transmission power of the TFCI only. However, the transmission power of the data portion is also increased, and the transmission power becomes unnecessarily large for the data portion, thereby wasting electric power.
For example, when a 64-kbps signal is transmitted, TFCI=8 bits, TPC=4 bits, and PL=8 bits for Data 1+Data 2=28+112 bits. Since the power is increased entirely (160 bits) when only the power of TFCI=8 bits is to be increased, thereby wasting the transmission power 160/8=20 times as much as the actually required power.